An Area-Efficient Maximum/Minimm Detection Circuit
نویسندگان
چکیده
This paper presents a novel circuit for parallel bit-level maximum/niinimum selection. The selection is based on a labelupdating scheme which sequentially scans a set of data patterns from MSB to LSB and generates corresponding labels. The complet? circuit realizing this scheme consists of a set of updating units and a global OR unit, where each updating unit is compased of only a few basic gat,es. Due to structure modularity, the developed circuit provides a very cost-effect,ivP hardware solution for comparing large volumes of data patterns as thosed required in digital and video signal processing.
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تاریخ انتشار 2004